Hyderabad, Ap Soc design engineer Jobs – 189 Open Jobs Today

RTL Design Engineer - SOC Integration
Advanced Micro Devices, Inc —Hyderabad, Telangana
- Human resources
- Linux
- Communication skills
RTL Design Engineer
Advanced Micro Devices, Inc —Hyderabad, Telangana
- Master's degree
- Analysis skills
- Bachelor's degree
SOC engineer
Infosys Limited —Hyderabad, Telangana
- Analysis skills
- Agile
- Communication skills
2026 Campus Hire_ Sr.Engineer_ HW
Qualcomm —Hyderabad, Telangana
- Doctoral degree
- Computer Science
- Master's degree
[India] Accelerator IP Design Engineer (ASIC, RTL)
EdgeCortix —Hyderabad, Telangana
- Full-time
- Research
- Java
- C++
Quick apply
Senior RTL design engineer - SOC Intergration
Advanced Micro Devices, Inc —Hyderabad, Telangana
- B.Sc
- Master's degree
- Analysis skills
[India] Design Verification Engineer
EdgeCortix —Hyderabad, Telangana
- Full-time
- Hybrid work
- Research
- Scripting
- Communication skills
Quick apply
2026 Campus Hire_ Engineer_ HW
Qualcomm —Hyderabad, Telangana
- Computer Science
- Master's degree
- Analysis skills
Soc / IP Verification Engineer
Advanced Micro Devices, Inc —Hyderabad, Telangana
- Windows
- Master's degree
- Analysis skills
ASIC Design Engineer
Axiado —Hyderabad, Telangana
- Full-time
- Python
Quick apply
ASIC Design Verification Engineer
Ceremorphic Technologies —Hyderabad, Telangana
- ₹1 a year
- Full-time
- Scripting
- Python
Quick apply
ASIC Verification Engineer
NVIDIA —Hyderabad, Telangana
- Full-time
- B.Sc
- Master's degree
- Bachelor's degree
[India] Physical Design Engineer
EdgeCortix —Hyderabad, Telangana
- Full-time
- Research
- Master's degree
- Bachelor's degree
Quick apply
Engineer - Cybersecurity N 4A
Genpact India Pvt. Ltd. —Hyderabad, Telangana
- Full-time
- Hybrid work
- Computer Science
- English
- Master's degree
Quick apply
10d
Sr. FPGA Design Engineer
Argus Technologies —Hyderabad, Telangana
- Email
- System design
- Master's degree
- C++
Design Verification Engineer
Mirafra Software Technologies —Hyderabad, Telangana
- C++
- Bachelor's degree
- Communication skills
Lead Platform Engineer
Shree Hr services —Hyderabad, Telangana
- ₹20,00,000 - ₹40,00,000 a year
- Full-time
- Hybrid work
- DevOps
- AWS
- Analysis skills
Quick apply
Staff ASIC Design Engineer
Axiado —Hyderabad, Telangana
- Full-time
- Mentoring
- Communication skills
- Python
Quick apply
ASIC Design and STA Engineer
NVIDIA —Hyderabad, Telangana
- Full-time
- Computer Science
- B.Sc
- Master's degree
1d
Embedded Systems Engineer (0–2 Years)
Eurth Techtronics —Hyderabad, Telangana
- Email
- Computer Science
- Master's degree
- C++

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RTL Design Engineer - SOC Integration

Advanced Micro Devices, Inc -
Hyderabad, Telangana

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Job details

Qualifications

FPGA
Git
Build automation
Verilog
SoC
Embedded software
Perforce
Version control systems
Perl
Human resources
Linux
SystemVerilog
Communication skills
Python
Digital design

Full job description

Overview:

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

Responsibilities:

MTS SILICON DESIGN ENGINEER

THE ROLE:
- AMD-Xilinx is seeking a capable and motivated SOC Design Engineer to be part of Front End SOC Design Team of next generation Adaptable Compute Acceleration Platform devices
- You will take part in design and implementation of high-performance, low-power SOCs and SOC Chiplets targeting a wide range of applications as well as customer specific products
- This high visibility and critical role will require technical leadership in developing microarchitecture, implementing functions in RTL, integrating IP from internal and external sources, ensuring quality and getting design ready for synthesis.
- You will also contribute to definition/evolution of SOC Design methodologies and processes for future projects
THE PERSON:
- Successful candidate will have an SOC/ASIC Design background, would have participated in several silicon design projects with increasing level of scope/responsibilities and has a history of achieving results through effective execution
KEY RESPONISIBILITES:
- Analyze existing design blocks for faults and vulnerabilities as application to automotive usage
- Define and specify micro-architecture of future SOC building blocks and necessary infrastructure based on architecture, PPA, DFT, Functional Safety requirements
- RTL design and debug of functions in Verilog / System Verilog
- Integration of hard macro or soft RTL IP into SOC top level
- Power domain/island creation (with UPF)
- Execution of quality checks to improve quality of RTL/UPF/SDC deliverables
- Analysis of design metrics and making implementation choices to optimize PPA
- Targeting SOC RTL to process technology
- Facilitating DFx/MBIST instrumentation
- Work with verification and physical design teams to achieve high quality design and successful tape out
- Collaborate with cross-functional teams to solve novel problems across multiple functional areas
- Design and implement underlying Power Management, Clk/Rst, NOC and DFT infrastructures to ensure implementation tool requirements are met and are optimized for compile time and memory
- Participate in tapeout checklists and reviews
- Build automation (Python, TCL, Perl) to enhance productivity of self and team
PREFERRED EXPERIECE:
- Digital design and experience with RTL design in Verilog/System Verilog
- Solid understanding of DFT technologies and some experience with execution of DFT flows
- Experience with SOC tools including Spyglass, Questa CDC, Cadence Conformal, VCS simulation
- Experience in specifying timing constraints with several clock domains and modes
- Basic experience with Synopsys Design Compiler and Primetime
- Experience designing with multiple power domains and islands using UPF
- Floor-planning and partitioning
- TCL, Python, Perl scripting
- Version control systems such as Perforce, IC Manage or Git
- Understanding of FPGA architecture and implementation flow
- Strong verbal and written communication skills
- Ability to organize and present complex technical information
- Fluent in working with Linux environment
Academic Credentials and Experience
- Will use HR Guidelines for grade. This information is not published in job posting.

#LI-SS1

Qualifications:

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

Apply Now

Refine Your Search

soc design engineer jobs in hyderabad, ap

RTL Design Engineer - SOC Integration

RTL Design Engineer

SOC engineer

2026 Campus Hire_ Sr.Engineer_ HW

[India] Accelerator IP Design Engineer (ASIC, RTL)

Senior RTL design engineer - SOC Intergration

[India] Design Verification Engineer

2026 Campus Hire_ Engineer_ HW

Soc / IP Verification Engineer

ASIC Design Engineer

ASIC Design Verification Engineer

ASIC Verification Engineer

[India] Physical Design Engineer

Engineer - Cybersecurity N 4A

Sr. FPGA Design Engineer

Design Verification Engineer

Lead Platform Engineer

Staff ASIC Design Engineer

ASIC Design and STA Engineer

Embedded Systems Engineer (0–2 Years)

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