Design Verification Engineer
Are you passionate about CPU verification and advanced SoC validation? We're looking for experienced CPUSS DV Engineers / Leads to join our high-performance semiconductor team.
Location: Bangalore / Hyderabad
Work Mode: Work From Office (WFO)
Experience: 5–20 Years
Key Responsibilities:
- Develop and maintain SystemVerilog/UVM-based testbench environments for CPU and cache subsystems.
- Debug and develop assembly test cases for CPU validation.
- Perform cache verification, including memory consistency, CHI protocol, coherence manager, and shared L1/L2/L3 cache verification.
- Verify RISC-V (RVA23) architecture compliance and functionality.
- Validate CPU pipeline stages including Fetch, Decode, Schedule, Execute, and Load/Store Units.
- Verify Vector Datapath functionality for correctness and performance.
- Collaborate with RTL, Architecture, and Design teams to debug simulation issues and improve verification quality.
Required Skills:
Strong expertise in SystemVerilog & UVM
CPU/Cache Verification Experience
Assembly Programming & Debugging
RISC-V (RVA23) Verification
Cache Coherency & CHI Protocol Knowledge
CPU Pipeline Verification
Excellent Debugging & Problem-Solving Skills
If you have the required experience and are looking for an exciting opportunity in CPU verification, we'd love to hear from you!
Apply now by sharing your updated resume.
Pay: From ₹800,000.00 per year
Benefits:
- Flexible schedule
- Life insurance
- Paid sick time
- Paid time off
Work Location: In person
