Up Engineer verification & validation Jobs – 71 Open Jobs Today

Associate III - VLSI_ALD_N
UST —Noida, Uttar Pradesh
- English
- Master's degree
- Electrical experience
Quick apply
R&D Mechanical Engineer
Vishay —Loni, Uttar Pradesh
- Full-time
- CAD
- Master's degree
- Analysis skills
3d
Senior developer – Python Full stack
WSP —Noida, Uttar Pradesh
- Hybrid work
- Azure
- Computer Science
- SQL
Senior Developer 2 for Non-Authoring Backend Logic
Alight —Noida, Uttar Pradesh
- Databases
- SQL
- AWS
- Health insurance
- Work from home
Senior Developer - .Net Full Stack
WSP —Noida, Uttar Pradesh
- Hybrid work
- Azure
- Computer Science
- SQL
Engineer -Validation
Arm —Noida, Uttar Pradesh
- Email
- Analysis skills
- Scripting
- Communication skills
1h
Senior Verification Engineer
Arm —Noida, Uttar Pradesh
- Email
- C++
- Scripting
- Python
7h

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Associate III - VLSI_ALD_N

UST -
Noida, Uttar Pradesh

Quick apply

Job details

Qualifications

Electronics Engineering
UNIX
English
Master's degree
Electrical experience
Data management
Electrical Engineering
Communication skills
Debugging

Full job description

Role description

Job Description:

You will be responsible for the methodology and flows development and validation in a multi-disciplinary team that covers various aspects:

Main interface with EDA partners for alignment on leading EDA vendors roadmap, critical requirements implementation and critical issues resolutions.
Deploying new methodologies and tools to all NXP R&D centers through deep collaboration and monitoring.
Providing advanced support as Application Engineer to NXP R&D centers teams when facing instabilities, issues impacting their planning or efficiency.
Master s degree in Electronics Engineering, Electrical Engineering, Computer Engineering, Applied Physics or an equivalent proficiency.
Experience with AMS-RF circuit design covering Virtuoso Schematics Editor and ADE (Analog Design Environment). Exposure to analog design techniques and simulation (Cadence Assembler/Explorer).
Experience with AMS-RF design physical implementation flows from floorplan to GDS including:
o Floorplan, placement, routing and verification (LVS, DRC and Antenna checks)
Experience with Cadence layout environment platform
Familiar with UNIX environment
Autonomous and possessing debug/problem-solving skills.
Excellent communication, presentation and documentation skills.
Proficient in communicating and writing technical documentation in English.
Able to work in a dynamic environment.
Considered a plus:
Experience in design migration between different foundries and nodes
Knowledge of Cadence SKILL coding language

Skills

vlsi design,cadence assembler,analog design techniques,ams-rf design physical implementation,floorplan,placement

About UST
UST is a global digital transformation solutions provider. For more than 20 years, UST has worked side by side with the world’s best companies to make a real impact through transformation. Powered by technology, inspired by people and led by purpose, UST partners with their clients from design to operation. With deep domain expertise and a future-proof philosophy, UST embeds innovation and agility into their clients’ organizations. With over 30,000 employees in 30 countries, UST builds for boundless impact—touching billions of lives in the process.

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engineer verification & validation jobs in up

Associate III - VLSI_ALD_N

R&D Mechanical Engineer

Senior developer – Python Full stack

Senior Developer 2 for Non-Authoring Backend Logic

Senior Developer - .Net Full Stack

Engineer -Validation

Senior Verification Engineer

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