Ka Receiver Jobs – 125 Open Jobs Today

RTL / Verilog Design Engineer (FPGA)
V3 Novus Private Limited —Sahakar Nagar, Bengaluru, Karnataka
- Full-time
- Analysis skills
- Scripting
- Python
- Health insurance
Quick apply
14d
UAV Pilot II
Newspace —Bengaluru, Karnataka
- Weekend availability
- Travel
- Communication skills
- Teaching experience
Quick apply
Senior Telecom Engineer
Egis Group —Bengaluru, Karnataka
- Full-time
- AutoCAD
- Bachelor's degree
Quick apply
SharePoint 2016 (Contract)
Saaki Argus & Averil Consulting —Bengaluru Rural District, Karnataka
- JavaScript
- Scripting
- SharePoint
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Associate Lead Consultant - SAP FICO
Yash Technologies —Bengaluru, Karnataka
- Agile
- Accounting
Lead Design Engineer
Cadence Design Systems —Bengaluru, Karnataka
- Full-time
- Doctoral degree
- Laboratory experience
- Bachelor's degree
Principal Design Engineer
Cadence Design Systems —Bengaluru, Karnataka
- Full-time
- Doctoral degree
- Laboratory experience
- Bachelor's degree
System Modelling Engineer
Intel —Bengaluru, Karnataka
- Full-time
- Doctoral degree
- Master's degree
- Bachelor's degree
Lead Engineer C++ and Python- Hybrid
Raytheon —Bengaluru, Karnataka
- Full-time
- C++
- Travel
- Software development
- Life insurance
Senior Engineer Verification
Infineon Technologies AG —Bengaluru, Karnataka
- Engineering
- Recruiting
- Communication skills
Custom Software Engineering Lead
Accenture —Bengaluru, Karnataka
- Full-time
- Master's degree
- APIs
- AI
Citrix
Capgemini —Bengaluru, Karnataka
- Software troubleshooting
- Windows
- Communication skills
System Engineer - BLR
Photon —Bengaluru, Karnataka
- Azure
- AWS
- Computer networking
Sr. Staff Engineer, Analog/Mixed-signal IC Layout
Ayar Labs —Bengaluru, Karnataka
- Scripting
- In-person
- Communication skills
Quick apply
10d
Principal Analog Design Engineer
Marvell —Bengaluru, Karnataka
- Doctoral degree
- Laboratory experience
- Master's degree
Senior Principal Engineer Analog Design (HBM PHY)
Marvell —Bengaluru, Karnataka
- Doctoral degree
- Computer Science
- Master's degree
Senior Principal Analog Lead – HBM PHY
Marvell —Bengaluru, Karnataka
- Doctoral degree
- Computer Science
- Master's degree
Analog Circuit Design Engineer
Intel —Bengaluru, Karnataka
- Full-time
- Doctoral degree
- Master's degree
- Bachelor's degree
IO Layout
Mirafra Software Technologies —Bengaluru, Karnataka
- Computer Science
- Master's degree
- Linux
Principal Engineer , ASIC Analog Design
Micron —Bengaluru, Karnataka
- B.Sc
- Laboratory experience
- Master's degree

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RTL / Verilog Design Engineer (FPGA)

V3 Novus Private Limited
Sahakar Nagar, Bengaluru, Karnataka

Quick apply

Job details

Full-time
14 days ago

Benefits

Internet reimbursement
Provident Fund
Health insurance

Qualifications

Signal processing
FPGA
Test automation
Verilog
Analysis skills
SoC
Embedded software
Scripting
SystemVerilog
Python
Debugging
Digital design

Full job description

RTL / Verilog Design Engineer (FPGA) :

We are seeking an RTL / Verilog Design Engineer (fresher to 3 years of experience) to develop FPGA-based digital logic for our signal processing, navigation, timing and control products. You will design, simulate, verify and implement RTL for high-pin-count FPGAs used in GNSS receivers, beacon receivers, time servers and antenna control systems.

Key Responsibilities

Design and develop RTL modules in Verilog/VHDL for FPGA-based products — interface controllers, timing logic, data acquisition and signal processing blocks.
Develop testbenches and perform functional simulation and verification of RTL designs (ModelSim/Vivado Simulator/Questa).
Perform synthesis, place-and-route, timing constraint definition (SDC/XDC) and timing closure on Xilinx/Intel FPGA platforms (Vivado/Quartus).
Implement and integrate interface logic such as UART, SPI, I2C, GPIO, memory controllers (DDR), Ethernet MAC and high-speed serial interfaces.
Integrate and validate soft processor cores (MicroBlaze/NIOS) and IP cores, and support hardware-software co-design with the firmware team.
Support FPGA board bring-up and hardware validation using ChipScope/ILA, oscilloscopes and logic analyzers.
Develop DSP blocks (filters, correlators, NCOs, mixers) for GNSS/beacon signal processing applications under guidance of senior engineers.
Document design architecture, verification plans, test reports and release notes.

Required Skills:

Strong fundamentals in digital design — combinational/sequential logic, FSMs, FIFOs, clock domain crossing and pipelining.
Good hands-on knowledge of Verilog (or VHDL) coding for synthesis and simulation.
Familiarity with FPGA design flow: simulation, synthesis, implementation, constraints and timing analysis.
Exposure to Xilinx Vivado or Intel Quartus toolchains.
Understanding of common peripheral interfaces (UART, SPI, I2C) and memory basics.
Ability to write testbenches and debug simulation waveforms.
Good problem-solving, analytical and documentation skills.
For experienced candidates (1–3 yrs): project experience in FPGA implementation, timing closure and board-level validation is expected.

Preferred / Added Advantage:

Academic or project exposure to DSP concepts (FIR/IIR filters, FFT, correlation) or SDR/GNSS signal processing.
Knowledge of AXI/AVALON bus protocols and SoC FPGA platforms (Zynq).
Exposure to high-speed interfaces (PCIe, SerDes, Gigabit Ethernet) or DDR memory controllers.
Familiarity with SystemVerilog or UVM-based verification.
Scripting skills (TCL, Python) for build and test automation.

What We Offer:

Opportunity to work on FPGA designs at the heart of mission-critical defense, SATCOM and navigation products.
Complete design-cycle exposure — RTL to silicon-on-board validation and field qualification.
Mentorship from an experienced core team in a fast-growing DeepTech company serving leading Indian PSUs and defense organizations.

Benefits:

Health insurance
Internet reimbursement
Provident Fund

Work Location: In person

Quick apply

Refine Your Search

receiver jobs in ka

RTL / Verilog Design Engineer (FPGA)

UAV Pilot II

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Analog Circuit Design Engineer

IO Layout

Principal Engineer , ASIC Analog Design

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