Up Asic digital design, principal engineer Jobs – 167 Open Jobs Today

Lead Engineer (IP Design & Microarchitecture)
Siemens —Noida, Uttar Pradesh
- Full-time
- Doctoral degree
- Master's degree
- C++
ASIC Digital Design, Principal Engineer
Synopsys —Noida, Uttar Pradesh
- Electrical experience
- Mentoring
- In-person
Principal Engineer - Fire
WSP —Noida, Uttar Pradesh
- Hybrid work
- Microsoft Word
- AutoCAD
- Microsoft Excel
ASIC Digital Design, Manager
Synopsys —Noida, Uttar Pradesh
- Management
- B.Sc
- Electrical experience
ASIC Digital Design, Sr Manager
Synopsys —Noida, Uttar Pradesh
- English
- Scripting
- In-person
Principal Engineer- ASIC Digital Design (Die to Die Communication protocol)
Synopsys —Noida, Uttar Pradesh
- Electrical experience
- Continuous improvement
- In-person
- Health insurance
Principal Engineer - Hydrology
WSP —Noida, Uttar Pradesh
- Hybrid work
- Civil engineering
- Computer literacy
- English
6d
Principal Engineer - Audio Visual Systems
WSP —Noida, Uttar Pradesh
- Hybrid work
- Agile
- Communication skills
Staff ASIC RTL Design (Turing) - Engineer
Qualcomm —Noida, Uttar Pradesh
- Doctoral degree
- Computer Science
- Master's degree
Principal Engineer, RTL Design
Renesas Electronics —Noida, Uttar Pradesh
- Full-time
- Computer Science
- Master's degree
- Project management
Quick apply
Principal RTL Design Engineer
STMicroelectronics —Greater Noida, Uttar Pradesh
- Master's degree
- Electrical experience
- Bachelor's degree
Principal Engineer, Performance Modelling
Renesas Electronics —Unknown, Uttar Pradesh
- Full-time
- Remote
- Master's degree
- Electrical experience
- Bachelor's degree
Quick apply
Principal Engineer - Water
WSP —Noida, Uttar Pradesh
- Hybrid work
- Civil engineering
- Microsoft Excel
- Computer literacy
6d
CPU Design - Associate Engineer
Qualcomm —Noida, Uttar Pradesh
- Doctoral degree
- Computer Science
- Master's degree
3d
Principal Consultant - Design Management
WSP —Noida, Uttar Pradesh
- Hybrid work
- AutoCAD
- Civil engineering
- Master's degree
ASIC Digital Design, Staff Engineer
Synopsys —Noida, Uttar Pradesh
- In-person
5d
Principal Track Engineer
Mott MacDonald —Noida, Uttar Pradesh
- Full-time
- AutoCAD
- Civil engineering
- Project management
- Health insurance
RTL (NOC)Design -Sr Lead/Staff
Qualcomm —Noida, Uttar Pradesh
- Doctoral degree
- Computer Science
- Master's degree
Associate Principal Engineer
BOLD LLC —Noida, Uttar Pradesh
- Databases
- SQL
- JavaScript
- Health insurance
- Paid time off
9d
Sr. Principal Design Engineer
Cadence Design Systems —Noida, Uttar Pradesh
- Full-time
- Data analysis skills
- Master's degree
- Analysis skills

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Lead Engineer (IP Design & Microarchitecture)

Siemens -
Noida, Uttar Pradesh

Apply Now

Job details

Permanent | Full-time

Qualifications

Public Relations
Doctoral degree
Signal processing
Master's degree
Bash (Unix shell)
Verilog
C++
C
Bachelor's degree
Public relations
SystemVerilog
Python

Full job description

Siemens EDA is a global technology leader in Electronic Design Automation (EDA) software. Our innovative tools empower companies worldwide to develop highly advanced electronic products faster and more cost-effectively. We're pushing the boundaries of technology and physics, enabling our customers to deliver superior products in the increasingly complex world of chip, board, and system design.

As a Hardware Accelerator Designer, you'll be at the forefront of this innovation, collaborating with algorithm architects and a talented team of designers. You'll play a crucial role in deriving architecture and micro-architecture decisions, and implementing and optimizing algorithms to transform them into low-power custom hardware accelerators using high-level synthesis methodologies.

What you'll do:
Develop, test, maintain, and improve design IPs for optimal Power, Performance, and Area (PPA).

Implement functionality in SystemC/C++ and ensure designs meet stringent Latency, Throughput, Area, and Power goals.

Perform comprehensive power, area, and performance trade-off analyses to identify the most efficient solutions.

Leverage High-Level Synthesis (HLS) to rapidly iterate and evaluate a wide range of possible implementations, narrowing down to the best-suited version.

Drive coverage closure and meet all other sign-off criteria for IPs within a high-level design and verification environment.

Author detailed design documents that clearly articulate your architectural and implementation choices.

What you'll bring:
5-10 years of experience in RTL design (Verilog, SystemVerilog, digital microarchitecture).

A Bachelor's/Master’s degree pr PhD Scholars with 6 years of relevant experience are preferred.

Proven experience in breaking down complex digital signal processing algorithms into Micro/RTL architecture, while effectively managing cost and quality trade-offs.

Proficiency in coding with C/C++/Python/Bash.

Experience with High-Level Synthesis (HLS) for ASICs or FPGAs is a significant advantage.

Knowledge of basic processor architecture.

Experience with the full ASIC design cycle (from specification through bring-up) is preferred.

We are Siemens

A collection of over 377,000 minds building the future, one day at a time, in over 200 countries. We're dedicated to equality and welcome applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit, and business need. Bring your curiosity and creativity and help us shape tomorrow!

We offer a comprehensive reward package which includes a competitive basic salary, bonus scheme, generous holiday allowance, pension, and private healthcare.

Transform the everyday!

Apply Now

Refine Your Search

asic digital design, principal engineer jobs in up

Lead Engineer (IP Design & Microarchitecture)

ASIC Digital Design, Principal Engineer

Principal Engineer - Fire

ASIC Digital Design, Manager

ASIC Digital Design, Sr Manager

Principal Engineer- ASIC Digital Design (Die to Die Communication protocol)

Principal Engineer - Hydrology

Principal Engineer - Audio Visual Systems

Staff ASIC RTL Design (Turing) - Engineer

Principal Engineer, RTL Design

Principal RTL Design Engineer

Principal Engineer, Performance Modelling

Principal Engineer - Water

CPU Design - Associate Engineer

Principal Consultant - Design Management

ASIC Digital Design, Staff Engineer

Principal Track Engineer

RTL (NOC)Design -Sr Lead/Staff

Associate Principal Engineer

Sr. Principal Design Engineer

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