Bengaluru Karnataka Principal sta engineer Jobs – 33 Open Jobs Today

SOC Engineering, Principal Engineer (STA)
Synopsys —Bengaluru, Karnataka
- Master's degree
- Analysis skills
- Bachelor's degree
7d
STA / Synthesis Engineer (Staff / Sr. Staff / Principal)
Velaura —Bengaluru, Karnataka
- ₹35,00,000 - ₹90,00,000 a year
- Full-time
- AI
- Health insurance
- Paid time off
Quick apply
3d
Senior Principal Engineer STA
GLOBALFOUNDRIES —Bengaluru, Karnataka
- Master's degree
- Analysis skills
- Electrical experience
SOC Engineering, Principal Engineer
Synopsys —Bengaluru, Karnataka
- Master's degree
- Analysis skills
- Bachelor's degree
- Health insurance
Senior Principal Engineer - STA
Larsen & Toubro —Bengaluru, Karnataka
- Master's degree
- Bachelor's degree
- Scripting
Principal Digital Design Engineer
onsemi —Bengaluru, Karnataka
- Full-time
- B.Sc
- English
- Master's degree
Principal STA Engineer
Analog Devices —Bengaluru, Karnataka
- Full-time
- Engineering
- Master's degree
- Electrical experience
Principal Engineer - Implementation
Microchip Technology —Bengaluru, Karnataka
- Full-time
- Master's degree
- Project management
- Bachelor's degree
Principal Engineer, High‑Speed RTL Design
Micron —Bengaluru, Karnataka
- Scripting
- AI
- Python
4d
Principal Engineer Design
Infineon Technologies AG —Bengaluru, Karnataka
- Master's degree
- Electrical experience
- Bachelor's degree
1d
Senior Principal Digital IC Design Engineer
onsemi —Bengaluru, Karnataka
- Full-time
- B.Sc
- English
- Master's degree
Principal ASIC Design Engineer
MaxLinear, Inc. —Bengaluru, Karnataka
- Full-time
- Doctoral degree
- Master's degree
- Analysis skills
Senior Staff/ Principal Engineer CAD Engineer (P&R)
Marvell —Bengaluru, Karnataka
- Full-time
- CAD
- Master's degree
- Analysis skills
Physical Design , Principal Engineer/Director, (Custom Silicon Group)
Qualcomm —Bengaluru, Karnataka
- Doctoral degree
- Computer Science
- Master's degree
2d
Principal Engineer- Digital Design
Renesas Electronics —Bengaluru, Karnataka
- Full-time
- Doctoral degree
- System design
- Master's degree
Quick apply
3d
Principal Engineer- CAD/EDA Tools & Design Automation Engineer
Marvell —Bengaluru, Karnataka
- Computer science
- Azure
- CAD
Principal/ Senior Principal STA Full Chip Expert
Marvell —Bengaluru, Karnataka
- Full-time
- Scripting
- Electrical Engineering
- AI
9d
principal Application engineer
Cadence Design Systems —Bengaluru, Karnataka
- Full-time
- Master's degree
- Electrical experience
- Bachelor's degree
PD engineer
Softpath —Bengaluru, Karnataka
- Full-time
- Linux
Quick apply
Physical Design Engineer (Staff / Sr. Staff / Principal)
Velaura —Bengaluru, Karnataka
- ₹35,00,000 - ₹90,00,000 a year
- Full-time
- AI
- Health insurance
- Paid time off
Quick apply
3d

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SOC Engineering, Principal Engineer (STA)

Synopsys -
Bengaluru, Karnataka

Apply Now

Job details

7 days ago

Qualifications

Master's degree
Analysis skills
SoC
Bachelor's degree
Perl
Mentoring
Scripting
B.E.
Electrical Engineering
Communication skills
Python

Full job description

Date posted 04/22/2026

Category Engineering Hire Type Employee Job ID 16909 Remote Eligible No Date Posted 04/22/2026

We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:
You are a passionate and driven STA Expert with a strong technical leadership and execution skills in Static Timing Analysis and design timing & power closure flows and methodologies. You have a proven ability to lead and deliver complex designs to tapeout. With at least 12 years of hands-on experience in advanced technology nodes such as 7nm, 5nm, or even 3nm, you thrive in fast-paced, innovative environments and are eager to tackle new technical challenges.

Your expertise spans the entire timing closure spectrum—from constraints development, validation, static timing analysis (STA), power analysis, Timing & power ECO generation. You may also have good understanding and working experience of synthesis, and Formal verification. You have experience in both block-level and full-chip expertise, and you’re adept at developing and validating timing constraints and closing timing on aggressive schedules. Your toolset includes industry-leading Synopsys solutions like PrimeTime, PrimePower, PT-PX, PrimeClosure, Tweaker allowing you to deliver optimal solutions for high-frequency, low-power designs.

Beyond your technical skills, you are a collaborative team player who communicates effectively across global teams, valuing diversity of thought and experience. You are motivated by problem-solving, have a keen analytical mindset, and are always seeking opportunities to automate and optimize workflows using Python, PERL, TCL, or other scripting languages. You take ownership of your work and pride yourself on delivering high-quality, robust solutions that drive organizational success. If you are excited about contributing to leading-edge silicon design and want to make a tangible impact, Synopsys is the place for you.

What You’ll Be Doing:
Independently own and drive signoff static timing analysis and timing closure for advanced process nodes (7nm/5nm/3nm), ensuring successful tape-outs.
Execute static timing analysis (STA), power analysis, synthesis and timing/power closure to meet stringent performance and power targets.
Develop and validate timing constraints at block-level or Full SoC level.
Knowledge of synthesis, clock tree structures, implementation and STA tool correlation, impact of constraints on physical implementation, parasitic extraction, and formal verification will be preferred.
Collaborate with cross-functional teams across geographies to resolve complex design challenges and ensure design quality and schedule adherence.
Utilize and optimize Synopsys EDA tools, including PrimePower, PT-PX, PrimeClosure, and Tweaker to deliver state-of-the-art silicon solutions.
Develop and maintain automation scripts in Python, PERL, TCL, or other relevant languages to streamline design flows and improve efficiency.
Contribute to the continuous improvement of static timing analysis flows and methodologies and best practices, sharing insights and mentoring junior engineers as needed.

The Impact You Will Have:
Accelerate the delivery of high-performance, low-power silicon solutions that power next-generation technology platforms worldwide.
Enable Synopsys customers to achieve first-pass silicon success through robust and innovative physical design implementations.
Drive technical excellence and best practices within the team, influencing the future direction of static timing analysis and timing closure methodologies at Synopsys.
Foster a collaborative and inclusive culture by working seamlessly with global teams and sharing technical expertise.
Contribute to Synopsys’ leadership in EDA tools adoption, providing valuable feedback to enhance product offerings and customer satisfaction.
Support strategic customer engagements and help expand Synopsys' presence in the semiconductor ecosystem through successful project outcomes.

What You’ll Need:
Bachelor’s or Master’s degree (BE/BTech/MTech or equivalent) in Electronics, Electrical Engineering, or a related field.
12+ years of relevant experience in static timing analysis, particularly in advanced technology nodes (7nm/5nm/3nm).
Comprehensive hands-on experience of constraints development, validation, static timing analysis (STA), power analysis, Timing and power ECO generation.
Proficiency with Synopsys EDA tools such as PrimeTime, PT-PX, PrimeClosure, Tweaker.
Working experience with Synopsys tools like Fusion Compiler, Design Compiler, Formality, and StarRC.
Strong scripting and automation skills using Python, PERL, TCL, or similar languages.
Solid understanding of timing constraints development, validation, static timing analysis and closure, for both block-level and full-chip designs.
Exposure to high-frequency design and low-power design methodologies.

Who You Are:
Proactive, self-motivated, and driven to achieve technical excellence.
Exceptional problem-solving and analytical skills with a keen attention to detail.
Excellent communication and interpersonal abilities, comfortable working in diverse and global teams.
Collaborative team player who values knowledge sharing and mentoring others.
Adaptable and open to learning new technologies and methodologies in a rapidly evolving field.

The Team You’ll Be A Part Of:
You’ll join a world-class team of backend and static timing analysis engineers at Synopsys, dedicated to delivering innovative system design solutions for our global customers. Our team thrives on collaboration, technical excellence, and a

Apply Now

Refine Your Search

principal sta engineer jobs in bengaluru karnataka

SOC Engineering, Principal Engineer (STA)

STA / Synthesis Engineer (Staff / Sr. Staff / Principal)

Senior Principal Engineer STA

SOC Engineering, Principal Engineer

Senior Principal Engineer - STA

Principal Digital Design Engineer

Principal STA Engineer

Principal Engineer - Implementation

Principal Engineer, High‑Speed RTL Design

Principal Engineer Design

Senior Principal Digital IC Design Engineer

Principal ASIC Design Engineer

Senior Staff/ Principal Engineer CAD Engineer (P&R)

Physical Design , Principal Engineer/Director, (Custom Silicon Group)

Principal Engineer- Digital Design

Principal Engineer- CAD/EDA Tools & Design Automation Engineer

Principal/ Senior Principal STA Full Chip Expert

principal Application engineer

PD engineer

Physical Design Engineer (Staff / Sr. Staff / Principal)

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Category Engineering Hire Type Employee Job ID 16909 Remote Eligible No Date Posted 04/22/2026

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