- Perform static timing analysis using Synopsys PrimeTime or Cadence Tempus
- Develop, validate, and maintain SDC constraints including clocks and exceptions
- Analyze setup/hold, transition, capacitance, and path-based violations
- Support timing closure and ECO implementation with PD teams
- Execute MCMM analysis across PVT corners and modes
Desired Candidate Profile
Qualifications : BACHELOR OF ENGINEERING
