Looking for an experienced ASIC Design Verification Engineer with 6+ years of experience and strong expertise in UVM-based verification methodology.
Strong understanding of system-level architecture, including AXI/AHB/CHI/ACE5 buses, bridges, memory controllers, and high-speed interfaces.
Experience with DDR4/DDR5, LPDDR4/LPDDR5, USB, PCIe Gen4/5/6, MIPI, I2C/I3C, SPI, and UART protocols.
Strong expertise in waveform debugging using industry-standard tools such as VCS, NCSIM, Verdi, and ModelSim.
Familiarity with ARM/RISC-V processors, boot flow, C/assembly, and strong cross-functional collaboration skills.
