Job Title: Physical Design Engineer
Experience: 4+ Years
Location: Bangalore
Notice Period: Immediate to 30 Days Preferred
Job Description
We are looking for an experienced Physical Design Engineer with strong hands-on expertise in end-to-end ASIC/SOC physical design flow. Candidate should have experience in block/full-chip implementation and timing closure for advanced technology nodes.
Required Skills
- Strong experience in Physical Design flow from Netlist to GDSII
- Expertise in:
- Floorplanning
- Power Planning
- Placement
- CTS (Clock Tree Synthesis)
- Routing
- STA & Timing Closure
- Physical Verification
- ECO Implementation
- Hands-on experience with:
- Cadence Innovus
- ICC2
- Tempus / PrimeTime
- Calibre
- Good understanding of:
- IR Drop
- EM Analysis
- Signal Integrity
- DRC/LVS
- Low Power Checks
- Experience in advanced technology nodes like 2nm/3nm/5nm/7nm/16nm/28nm is preferred
- Strong scripting knowledge in Tcl/Perl/Python
- Experience in block-level and full-chip implementation
- Excellent debugging and problem-solving skills
Qualification
- B.Tech / M.Tech in ECE or related field
- 4+ years of relevant Physical Design experience
Preferred
- Experience in multiple tape-outs
- Knowledge of low-power design techniques
- Good communication and teamwork skills
Interested candidates can share resumes to: [email protected]
Work Location: In person
