The RADAR product line is a rapidly expanding business within TI, investing to address the fast-growing segment in Industrial & automotive markets. This product line will enable a scalable portfolio using DSP and ARM multi-cores to support high-end applications in ADAS, body & Chassis and in Industrial space. Radar systems process digital information from sources like digital cameras, lasers, radar and other sensors to perform tasks such as lane departure warning or parking assistance. The processed information can be displayed on screens or announced via acoustical warning signals. The system has multifaceted features such as High precision ADC, extremely accurate chirp, wide range visibility and Faster scene processing abilities. As a Verification technologist, you will play a pivotal role in ensuring the quality and reliability of our advanced RADAR products. You will be responsible for the verification of IP, Subsystem (SS), and System-on-Chip (SoC) designs, delivering the ATE patterns and customer debugs on top of contributing to the development of robust verification methodologies and strategies adhering to ISO26262/ISO21434 standards.
Responsibilities:
End-to-End ownership of IP/subsystem/SOC DV/Post silicon TDL handoffs ownership right from spec definition till the post silicon verification and solving the customer issues. This includes:
- Technical:
- Active involvement with architecture team during the spec definition phase
- Verification strategy definition along with Verification plan to meet 100% spec to regression traceability along with standard signoff metrics
- IP/SS/SOC verification covering functional and Firmware scenarios in RTL/PARTL, GLS/PAGLS modes.
- DV Environment ownership: TB definition & development, enhancements including UVC integration, checkers and coverage monitor updates along with DV flow updates as per the project needs
- Active collaboration with cross functional teams -Architecture, RTL, PD, DFT, Systems, Analog, FW and application teams -to enable the Verification goals for IP/Subsystem/SOC starting from spec definition till post silicon verification closure activities
- Final SoC DV signoff based on Regressions, coverage metrics, DV to spec traceability using C and/or SV-UVM adhering to ISO26262/ ISO21434 guidelines
- Active involvement in the customer reviews and certifications (ISO26262/ISO21434).
- Innovation Mindset
- Led end-to-end Design Verification (DV) projects by defining verification strategies and guiding technical execution.
- First-pass silicon success by driving close technical collaboration across design, architecture, and validation teams.
- Learn, Evaluate and deploy advanced verification strategies—including AI/ML-based frameworks—integrating key learnings from previous projects to maximize verification quality and test bench efficiency.
