Minimum 3 years of System C development experience and 6+ overall experience.
Strong hands-on expertise in SystemC and TLM2.0 modeling.
Experience in modeling memory controllers, peripherals, and interconnects for SoC/virtual platform development.
Solid understanding of SoC architecture, computer architecture, and system-level simulation concepts.
Experience in model validation, debugging, performance optimization, and testbench development.
Strong analytical, problem-solving, and cross-functional collaboration skills with the ability to create clear technical documentation.
