Role description
Develop and execute feature enablement and validation test plans for BIOS/Firmware level SoC features across all AMD embedded products.
- Defines risk-based test plans, exit criteria, and sign-off quality gates
- Improves test coverage, execution efficiency, and failure triage turnaround
- Proactively identifies gaps and drives improvements
- Develop post-silicon validation infrastructure (software, hardware, automation environment, and lab setup)
- Execute manual and automated validation for boot flows, power management, security, HSIO, LSIO, USB, BMC and platform interfaces
- Lead debug and drive root-cause analysis for BIOS/Firmware related issues
- Develop and maintain validation scripts/tools (Python, shell, batch) to improve coverage and reduce execution time
- Work with cross-functional teams to improve post-silicon validation test strategy, debug, methodology, and process.
- Manage and track technical issues, risks, and priorities. Manage executive communications, including program status, risks and opportunities.
- Excellent problem-solving skills and willingness to think outside the box.
- Experience with production software quality assurance practices, methodologies, and procedures
Years of experience: 6 to 8 years
Skills
semiconductor product validation,bios,firmware,test planning,software validation,test coverage,
About UST
UST is a global digital transformation solutions provider. For more than 20 years, UST has worked side by side with the world’s best companies to make a real impact through transformation. Powered by technology, inspired by people and led by purpose, UST partners with their clients from design to operation. With deep domain expertise and a future-proof philosophy, UST embeds innovation and agility into their clients’ organizations. With over 30,000 employees in 30 countries, UST builds for boundless impact—touching billions of lives in the process.
