Required Qualifications
▸ Bachelor of Science in Electrical Engineering (BSEE) — Mandatory
▸ Minimum 3 years of professional experience in analog/mixed-signal IC circuit design
▸ Proficiency with Cadence Virtuoso Schematic Editor and Analog Design Environment (ADE-L/XL/GXL)
▸ Hands-on SPICE simulation experience using Spectre, HSPICE, or Eldo — including Monte Carlo and PVT corner analysis
▸ Demonstrated design experience with at least 3 of the macro categories listed in the Circuit Design Scope section
▸ Solid understanding of MOSFET device physics, noise analysis, stability (phase margin), and mismatch/variation effects
▸ Familiarity with FinFET or advanced CMOS process node design constraints and device models
Preferred Qualifications
▸ M.S. in Electrical Engineering with focus on analog/mixed-signal circuits or microelectronics
▸ Experience with high-speed serial interface standards: PCIe Gen 4/5, USB 3.x/4, DDR5, MIPI, or custom SerDes at 10–112 Gbps
▸ Proficiency in Verilog-A / Verilog-AMS behavioral modeling for system-level mixed-signal simulation
▸ Prior collaboration with foundries such as TSMC, Samsung, GlobalFoundries, or Intel Foundry
▸ Exposure to PDK bring-up, device model validation, and SPICE model correlation to silicon data
▸ Knowledge of analog design fundamentals: op-amp topologies, feedback theory, frequency compensation, and bandgap references
Pay: ₹600,000.00 - ₹700,000.00 per year
Benefits:
- Food provided
- Health insurance
- Leave encashment
- Provident Fund
Work Location: In person
