Role description
FPGA Lead Architect
- 8+ years experience on Intel/Altera FPGAs (Agilex, Stratix 10, Arria 10)
- Architecting FPGA systems with PCIe Gen4/Gen5 Hard IP
- Expertise in Quartus Prime Pro, Platform Designer, timing closure, transceiver configuration
- Experience with NVMe/PCIe protocols, DMA engines, and high speed digital design
- Ownership of system architecture, FPGA design reviews, floorplanning, and integration
Guide team on RTL quality, CDC, SDC constraints, SignalTap debug, and performance optimization
Skills
vlsi design,fpga,intel fpgas,agilex,
About UST
UST is a global digital transformation solutions provider. For more than 20 years, UST has worked side by side with the world’s best companies to make a real impact through transformation. Powered by technology, inspired by people and led by purpose, UST partners with their clients from design to operation. With deep domain expertise and a future-proof philosophy, UST embeds innovation and agility into their clients’ organizations. With over 30,000 employees in 30 countries, UST builds for boundless impact—touching billions of lives in the process.
