At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You are a passionate and inventive analog circuit design engineer with a deep-rooted curiosity for emerging technologies and industry-leading semiconductor processes. You thrive in dynamic, collaborative environments and are recognized for your ability to balance technical depth with practical implementation. Your expertise in I/O development, ESD (Electrostatic Discharge), and Latch-Up (LU) robustness sets you apart, and you are eager to build solutions that power the next generation of high-performance chips.
You bring a strong foundation in FinFet, FDSOI, and BCD technologies, and you are excited by the prospect of owning projects end-to-end—from conceptual design through to silicon qualification. Your approach is meticulous and data-driven, ensuring each design meets the highest standards of quality and reliability. You are comfortable working across cross-functional teams, collaborating with foundries, and integrating feedback from global stakeholders.
Continuous learning excites you, and you embrace opportunities to mentor others, share knowledge, and contribute to a culture of technical excellence. You are motivated by the impact your designs have on real-world products and are committed to delivering robust, scalable, and innovative solutions for Synopsys’ worldwide customers.
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Designing and developing best-in-class ESD and Latch-Up robust solutions for advanced interface IPs using cutting-edge FinFet, FDSOI, and BCD processes.
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Owning the full lifecycle of ESD structures—from schematic design, simulation, and layout to silicon qualification and production release.
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Leading and executing I/O development, including I/O ring design, review, and optimization for performance and robustness.
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Developing and qualifying Interface Testchips, ensuring comprehensive ESD and Latch-Up validation to meet global customer requirements.
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Running ESD simulations by building detailed ESD networks and performing advanced analyses to ensure design integrity.
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Applying foundry-provided PERC (Physical Verification Rule Check) rules and using PERC check tools to validate compliance and enhance design quality.
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Collaborating closely with foundry partners, design, and layout teams to ensure timely and effective integration of ESD and LU solutions.
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Elevating the reliability and performance of Synopsys’ interface IPs, directly influencing the success of global semiconductor customers.
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Driving innovation in analog circuit design for next-generation silicon technologies, helping Synopsys maintain its leadership in the industry.
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Reducing field failures and increasing product longevity by delivering robust ESD and Latch-Up protection solutions.
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Accelerating time-to-market for customer products through efficient and high-quality design practices.
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Fostering a culture of technical excellence and continuous improvement within the analog design team.
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Building strong partnerships with foundries and cross-functional teams, enhancing collaboration and knowledge sharing across projects.
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Proven experience in analog circuit design, with a focus on I/O development and ESD/LU robustness.
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Hands-on expertise with FinFet, FDSOI, and BCD process technologies from leading foundries.
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Strong background in ESD and Latch-Up qualification methodologies, including testchip development and validation.
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Proficiency in ESD simulation, ESD network construction, and use of industry-standard tools.
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Comprehensive understanding of PERC rules and practical experience with PERC verification tools.
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Experience working with cross-functional teams including foundry, design, and layout groups.
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An analytical thinker with excellent problem-solving skills and keen attention to detail.
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A collaborative team player who values diversity, inclusion, and open communication.
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A proactive learner who stays current with industry trends and emerging technologies.
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An effective communicator, able to translate complex technical information to diverse audiences.
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A results-driven individual who is adaptable, resilient, and comfortable with fast-paced, high-impact work.
You’ll join a passionate, multidisciplinary team of analog and mixed-signal engineers dedicated to advancing Synopsys’ interface IP portfolio. The team is focused on delivering robust, innovative, and high-quality solutions that meet the rigorous demands of a global customer base. Collaboration, continuous improvement, and technical mentorship are at the core of our culture, ensuring you’ll have the support and opportunities needed to thrive and grow.
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
