Bangalore, Karnataka
Job Summary
Candidates with minimum 15 years experience is mandatory
Experience in defining micro-architecture specifications for high-performance, low-power digital design blocks and subsystems.
Establish, standardize, and continuously improve engineering methodologies, automation scripts, and best practices across the organization.
Experience in Full chip RTL integration
Experience with ASIC/SoC development flow including synthesis/timing constraints development, Static Timing Analysis closure, resolving P& R congestion issues etc.
Experience in RTL Synthesis
Scripting experience
Experience integrating IP's like PCIe, DDR, Ethernet etc.
Should be able to lead a team of 5 to 6 leads under whom entry level engineers will be there.
Expected to handle minimum 3 projects simultaneously
Experience in handling and interacting with clients across different Geos.
Excellent communication skills are mandatory.
Should be able to interact with leads of different disciplines and able to work in a collabarative manner with different SPOCs
Key Responsibilities
1. To bridge the gap between client needs and business goals by gathering requirements, crafting innovative solutions with deep domain/technology expertise, and driving successful implementations that propel strategic initiatives.
2. To spearhead the architecture, design, and development (through a high-performing team) of innovative solutions for product/project & sustenance delivery, ensuring alignment with strategic objectives.
3. To ensure knowledge up-gradation and work with new technologies so that the solution is current and meets quality standards and the client requirements
4. To review architecture and design deliverables and ensure solutions adhere to industry best practices ,architectural standards simultaneously establish and enforce governance /compliance measures.
5. To train and develop team so as to ensure that there is an adequate supply of trained manpower in the said technology and delivery risks are mitigated
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