Years of Experience: 3–4 Years
Location: Bangalore
Work from Office
We are designing indigenous, massive MIMO radar systems on the mm-wave spectrum, geared toward cutting-edge security screening and indoor imaging applications. We operate at the intersection of complex RF hardware, high-speed digital design, and fundamental signal processing.
We are seeking a highly skilled Digital Design Engineer to architect and implement the high-speed data pipelines, control planes, and deterministic timing logic that form the backbone of our radar systems. You will bridge the gap between custom hardware and embedded software, handling unprecedented data avalanches and driving critical component selection.
- High-Speed Data Ingestion: Architect and program FPGA pipelines to ingest, preprocess, and route massive data streams (>10 Gbps). Manage high-speed data reception through MIPI CSI-2 interfaces and ensure reliable transmission to downstream compute nodes.
- Architecture & HW/SW Partitioning: Drive the system-level architecture by determining the optimal hardware-software partitioning for processing, storing, and routing data across large form-factor systems.
- Component Selection: Evaluate and select appropriate FPGAs and System-on-Chips (SoCs), rigorously analyzing cost, power, and performance tradeoffs for production-scale deployment.
- Embedded Systems & Control Planes: Program ARM processors and microcontrollers to work in tandem with the FPGA. Design and implement robust data and control planes across the board.
- Radar Timing & Sequencing: Develop strictly deterministic logic utilizing both FPGAs and microcontrollers to manage the complex Tx-Rx sequencing and synchronization for our MIMO radar arrays.
- Education: B.Tech or M.Tech in Electronics & Communication, Electrical Engineering, Computer Engineering, or a related field.
RTL & FPGA Development:
- Deep proficiency in Verilog/SystemVerilog or VHDL.
- Extensive hands-on experience with major FPGA toolchains (e.g., Xilinx Vivado, Intel Quartus).
- Proven track record of closing timing on high-speed, resource-constrained designs.
High-Speed Interfaces:
- Practical expertise implementing and debugging high-speed digital interfaces, particularly MIPI CSI-2, PCIe, and Gigabit Ethernet.
Embedded Software:
- Strong programming skills in C/C++ for embedded systems.
- Experience with bare-metal programming and RTOS on ARM Cortex-A/M series or similar microcontrollers.
System-on-Chip (SoC) Architectures:
- Experience working with heterogeneous architectures (e.g., Xilinx Zynq / MPSoC) where FPGAs and hard-processor systems share memory (DDR, DMA) and peripherals.
Board-Level Communication:
- Mastery of standard low-speed protocols for control plane design (SPI, I2C, UART) and high-speed data routing.
Lab & Debugging Skills:
- Hands-on experience bringing up custom hardware and using oscilloscopes, logic analyzers, and protocol analyzers.
- Prior experience working in mixed-signal environments or directly interfacing digital systems with RF/Radar transceivers.
- Familiarity with signal processing concepts and implementing DSP blocks on FPGAs.
