Location: Location: Bengaluru/Bhubaneswar/Ranchi
Experience: 7 - 10 Years
Technical Requirements:
- Digital Logic Design: Strong expertise in digital logic design with hands-on
experience in RTL coding using Verilog and SystemVerilog.
- Peripheral Design: Experience in designing high-speed and low-speed peripherals.
- Design Optimization: Deep understanding of synthesis, timing constraints, clock
domain crossing (CDC), and logic optimization techniques.
- Automation: Proven experience in automating RTL generation for various design
parameters.
- Low Power Design: Exposure to low power design techniques, including working
with multiple power and clock domains.
- SoC Integration: Familiarity with ARM SoC, AMBA IP-based designs, and SoC/sub-
system integration.
- Protocol Knowledge: Strong knowledge of protocols such as PCIe, DDRx, Ethernet,
USB, AXI, AHB, APB, I2C, and SPI is highly desired.
Expectations from the Role:
- Communication & Independence: Excellent communication and interpersonal skills,
with the ability to work independently.
- Adaptability: A fast learner who can efficiently operate in a distributed work
environment.
- Initiative & Punctuality: Demonstrates ownership, initiative, and punctuality in all
responsibilities.
- Leadership: Ability to mentor and lead a team to solve complex design challenges.
