Location: Location: Bengaluru/Bhubaneswar/Ranchi
Experience: 5 - 10 Years
Technical Requirements:
- Memory Architecture: In-depth knowledge of memory design architectures,
including SRAM, DRAM, Flash, and other non-volatile memory types.
- Circuit Design: Expertise in designing memory cells, sense amplifiers, decoders, and
other associated memory circuit blocks.
- Process Technology: Familiarity with advanced CMOS technology nodes and their
impact on memory design, including scaling challenges.
- Design Optimization: Experience in optimizing memory for performance, power,
and area, including techniques for reducing leakage and improving access times.
- Verification & Validation: Proficient in memory verification techniques, including
corner analysis, reliability testing, and post-silicon validation.
- EDA Tools: Hands-on experience with memory design tools, including Cadence,
Synopsys, and Mentor Graphics.
- Yield Enhancement: Knowledge of yield enhancement techniques, including
redundancy and error correction codes (ECC).
Expectations from the Role:
- Technical Leadership: Strong technical leadership skills with the ability to guide and
mentor junior team members.
- Problem-Solving: Excellent problem-solving abilities, particularly in diagnosing and
resolving memory design challenges.
- Innovation: Ability to innovate and drive improvements in memory design,
balancing performance and manufacturability.
- Collaboration: Strong communication and teamwork skills, with the ability to work
effectively with cross-functional teams.
- Project Focus: Ability to manage and prioritize multiple projects, ensuring timely
and successful project completion.
