Define high-level hardware architecture, including component selection (FPGAs, CPUs, GPUs) and power distribution networks (PDN) for complex PCBAs.
Lead the design and implementation of multi-gigabit interfaces such as PCIe Gen 5/6, DDR4/5, Ethernet (100G/400G), and SerDes.
Perform and oversee advanced simulations using tools like Ansys HFSS, SIwave, or Cadence Sigrity to ensure timing margins and EMI/EMC compliance.
Own the product from schematic capture and rigid-flex PCB stack-up design to bring-up, debugging, and mass production hand-off.
Act as the primary point of contact for cross-functional teams (Signal Integrity, Mechanical, Thermal, and Firmware) to resolve design trade-offs.
Expert proficiency in Altium Designer, Cadence Allegro, or Mentor Graphics (Xpedition).
Hands-on experience: high-bandwidth oscilloscopes (DSOs), Bit Error Rate Testers (BERT), and Vector Network Analyzers (VNA)
Strong experience in technical roadmapping and vendor management for PCB fabrication and component sourcing
