About the job
Job: Design Verification Engineer (6+ YOE)
Location: Bengaluru | Noida
Employment Type: Full-time
Experience: 6+ years
Function: Semiconductor Engineering — Design Verification
About SiliconBoard
SiliconBoard connects semiconductor engineering talent with companies across the semiconductor ecosystem. This opportunity is offered through the SiliconBoard Talent Network. Shortlisted profiles are evaluated and shared with hiring companies within our partner network for relevant open positions.
About the Role
We are looking for experienced Design Verification Engineers with strong hands-on experience in functional verification of complex digital designs and SoCs.
You will be responsible for building verification environments, developing test plans, writing and debugging testcases, driving coverage closure, and identifying functional issues across IP, subsystem, or SoC-level designs.
The role involves working closely with RTL designers, architects, firmware teams, and other verification engineers to ensure high-quality design closure before tapeout.
Key Responsibilities
Verification Planning
- Understand design specifications, architecture, protocols, and functional requirements.
- Develop detailed verification plans and identify key verification scenarios.
- Define test strategy, coverage goals, and verification methodology.
- Work closely with architects and RTL designers to identify corner cases and potential design risks.
Testbench Development
- Develop and maintain scalable verification environments using SystemVerilog and UVM.
- Build reusable testbench components, sequences, monitors, scoreboards, and checkers.
- Develop constrained-random and directed testcases.
- Integrate verification IP and third-party VIP where required.
Functional Verification
- Verify IP, block, subsystem, or SoC-level functionality.
- Develop tests for functional, error, stress, and corner-case scenarios.
- Debug RTL and testbench failures using simulation and waveform analysis.
- Work with design teams to identify root causes and drive issue resolution.
Coverage and Verification Closure
- Define and track functional and code coverage.
- Identify coverage gaps and develop additional test scenarios.
- Drive verification closure against defined coverage and quality goals.
- Analyze regressions and improve testbench stability and efficiency.
Protocol and Interface Verification
- Verify standard and proprietary interfaces used within the design.
- Develop protocol-level verification scenarios and check protocol compliance.
- Debug interface, synchronization, ordering, and data-integrity issues.
Debug and Collaboration
- Debug complex functional failures across RTL, testbench, firmware, and interface boundaries.
- Work closely with RTL, architecture, validation, and implementation teams.
- Participate in design and verification reviews.
- Support pre-silicon verification and, where required, post-silicon debug.
Required Qualifications
- B.E./B.Tech or M.E./M.Tech in Electronics, Electrical Engineering, VLSI, Microelectronics, or a related discipline.
- 6+ years of hands-on industry experience in Design Verification.
- Strong experience with SystemVerilog and UVM.
- Experience building and maintaining verification environments.
- Strong understanding of constrained-random verification and coverage-driven verification.
- Hands-on experience with simulation, regression, debug, and coverage closure.
- Good understanding of digital design and RTL fundamentals.
- Experience debugging complex functional issues.
- Ability to understand specifications and convert them into verification plans and test scenarios.
Preferred Qualifications
Relevant experience in one or more of the following areas:
- UVM testbench architecture
- SystemVerilog Assertions
- Functional coverage
- Code coverage
- Constrained-random verification
- Regression management and debug
- IP-level verification
- Subsystem-level verification
- SoC-level verification
- Protocol verification
- Formal verification
- Low-power verification
- Performance verification
- Error injection and corner-case verification
- Gate-level simulation
- Post-silicon validation or debug
Experience with one or more common protocols is preferred, such as:
- PCIe
- AXI / AHB / APB
- DDR
- USB
- Ethernet
- CXL
- AMBA protocols
- MIPI
- SPI / I2C / UART
Experience working with industry-standard simulators, debug platforms, VIP, formal tools, and verification management tools is preferred.
Hiring Process
- Submit your resume through the application link.
- Profiles are manually reviewed and shortlisted by the SiliconBoard team.
- Shortlisted candidates may receive a technical screening or AI-based technical interview.
- Qualified profiles are shared with the hiring company for the next stage of the process.
Additional Information
This opportunity is with a SiliconBoard client company and not with SiliconBoard directly.
Compensation is determined by the hiring company based on role, experience, technical depth, and interview performance.
Submission of an application does not guarantee an interview, referral, or employment.
Profiles are evaluated based on verification methodology, UVM depth, testbench ownership, debug capability, coverage closure, protocol knowledge, project complexity, and overall verification experience, along with the requirements of the hiring company.
Pay: ₹257,428.50 - ₹638,419.93 per year
Work Location: In person
