Bachelor’s degree in electrical, electronics, or related Engineering field with 6+ years’ experience in analog IC design within the semiconductor industry.
Deep understanding of CMOS/BiCMOS analog circuit design practices.
Proven experience as a technical lead on chip development projects.
Strong mixed-signal design experience.
Expert proficiency with Cadence design environment, simulation, and verification tools.
Expert proficiency with device modelling (Verilog-AMS, SystemVerilog) and mixed-signal simulation.
Understanding of design for manufacturability (DFM), reliability, and yield optimization.
Solid understanding of mixed-signal design, including parasitic, matching, ESD, latch up, crosstalk, and IR drop.
Experience in chip top level verification and production experience is a plus
Documentation of design results, characterization results and DFMEA
Experience in translating MEMS models into equivalent circuits
Demonstrated innovation and creative problem-solving capabilities.
Analog block and full chip level schematic design, process corner analysis, and post-layout simulation
Block level verification including LVS/DRC/PEX
Fluent in written and spoken English
