Date posted 04/20/2026
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You are a passionate and detail-oriented engineer with a solid background in analog and mixed-signal circuit design. You thrive in a collaborative environment and excel at transforming technical challenges into innovative solutions. Your educational foundation in Electronics or Electrical Engineering (BTech/MTech) is complemented by 1–3 years of hands-on experience in CMOS technology, deep submicron processes, and ASIC design flows. You are familiar with JEDEC standards and DDR interfaces, and you bring a solid grasp of circuit layout methodologies and ESD concepts.
What You’ll Be Doing:
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Design and develop DDR/HBM Memory Interface I/O circuits, including GPIO and special I/Os, ensuring robust performance and reliability.
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Collaborate closely with DDR/HBM PHY teams, package engineers, and system engineers to meet stringent design specifications and project milestones.
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Execute circuit design tasks with a focus on quality, efficiency, and adherence to industry standards.
- deep knowledge of CMOS processes and analog/mixed-signal circuitry to innovate and refine design methodologies.
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Review and optimize circuit layouts, ensuring compliance with ESD and JEDEC standards for DDR interfaces.
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Participate in design reviews, provide technical input, and contribute to the continuous improvement of design flows and best practices.
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Document design processes, test plans, and results, supporting knowledge sharing and future project success.
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Drive the development of high-performance memory interface solutions that power next-generation technologies.
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Enhance the robustness and reliability of Synopsys’ analog and mixed-signal IP portfolio.
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Ensure products meet or exceed industry standards, supporting customer success and market leadership.
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Influence cross-functional teams by sharing insights and best practices in circuit design and layout.
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Contribute to the delivery of cutting-edge silicon solutions for global semiconductor leaders.
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Support continuous innovation, helping Synopsys stay ahead in a competitive, fast-moving industry.
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BTech/MTech in Electronics or Electrical Engineering.
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1–3 years of experience in analog/mixed-signal circuit design, with expertise in CMOS processes and deep submicron technologies.
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Proficiency in CMOS circuit design and layout methodologies; experience with ESD concepts is a plus.
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Familiarity with ASIC design flows and JEDEC DDR interface requirements, including DDR Timing, ODT, and SDRAM functionality.
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Ability to work with cross-disciplinary teams to meet complex design specifications and project goals.
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Analytical thinker with strong problem-solving skills and attention to detail.
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Adaptable team player, eager to collaborate and
