WE ARE HIRING: 20+ Design Verification (DV) Engineers
Our team is expanding rapidly! We are looking for 20+ Design Verification Engineers to join us in Hyderabad.
If you are passionate about cutting-edge SoC/IP verification and love solving complex debugging puzzles, we want you on board.
Position: Design Verification (DV) Engineer
Location: Hyderabad
Openings: 20+ Positions (Multiple seniority levels)
Notice Period: Immediate Joiners preferred (Max 15 days)
Experience: 7 to 10yrs
Salary: can be discussed on experience and knowledge
Location: Hyderabad
Key Requirements:
* Strong expertise in SystemVerilog and UVM methodologies.
* Experience creating test benches, authoring verification plans, and defining functional coverage.
* Hands-on experience with protocols like PCIe, AMBA (AXI/AHB), DDR, USB, or similar.
* Solid scripting skills (Python / Perl) for automation.
Pay: Up to ₹1,500,000.00 per year
Benefits:
- Health insurance
- Life insurance
- Paid time off
- Provident Fund
Work Location: In person
