Navitas Semiconductor is seeking a Staff Engineer – SiC Technologist to serve as a senior technical leader within the India Center of Excellence. This role will drive advanced SiC technology development, device characterization strategy, reliability learning cycles, qualification readiness, and technical problem solving across GeneSiC™ MOSFETs, diodes, discretes, known-good-die, and SiCPAK™ module platforms. The Staff Engineer will be expected to connect device physics, process integration, package behavior, application stress conditions, and customer mission profiles to accelerate robust, high-efficiency SiC solutions for AI data centers, grid and energy infrastructure, industrial electrification, renewable energy, EV charging, and high-power conversion systems.
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Lead SiC technology development activities across device performance, process interaction, reliability robustness, package integration, and application-level stress behavior.
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Define characterization strategies for high-voltage SiC devices, including static, dynamic, switching, avalanche, short-circuit, thermal, body diode, gate oxide, and mission-profile-driven stress conditions.
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Architect test plans and data analysis methodologies to evaluate technology maturity, qualification readiness, design margins, and reliability risks across wafer, die, discrete, and module formats.
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Drive root-cause analysis for complex device, process, package, reliability, or customer-observed performance issues using electrical characterization, failure analysis, statistical modeling, and process history.
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Lead design-of-experiments planning, split-lot evaluation, process change assessment, technology transfer reviews, and engineering change impact analysis.
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Partner with global device engineering, product engineering, reliability, quality, applications, test, packaging, operations, and business teams to translate technology learning into product and platform improvements.
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Develop reusable characterization platforms, automated analysis flows, dashboards, and technical standards that increase engineering velocity and consistency across the India CoE and global teams.
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Provide technical guidance on SiC MOSFET and diode behavior across voltage classes, including 650 V, 1200 V, 1700 V, 2300 V, 3300 V, and higher-voltage platforms as applicable.
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Mentor Senior and junior engineers, review technical work products, and build deep SiC competency within the India Center of Excellence.
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Represent the SiC technology team in technical reviews, leadership updates, customer-facing discussions, supplier engagements, and external technical collaborations when required.
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Bachelor’s, Master’s, or Ph.D. degree in Electrical Engineering, Electronics Engineering, Materials Science, Physics, Microelectronics, Semiconductor Technology, Power Electronics, or a related discipline.
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8–12+ years of relevant experience in semiconductor technology development, SiC power device engineering, device characterization, reliability, product engineering, process integration, test, or failure analysis.
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Deep understanding of SiC power device physics, including MOS channel behavior, gate oxide reliability, drift region design, junction termination, body diode behavior, trapping effects, dynamic RDS(on), avalanche ruggedness, and high-temperature operation.
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Demonstrated ability to lead complex technical investigations from problem definition through data collection, root-cause analysis, corrective action, validation, and closure.
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Strong experience with electrical characterization and reliability testing of power devices using high-voltage SMUs, curve tracers, parametric analyzers, oscilloscopes, double-pulse testers, thermal systems, probe stations, reliability stress platforms, and custom test setups.
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Experience interpreting statistical distributions, wafer maps, parametric trends, reliability drift, outlier behavior, and process/device correlations.
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Ability to influence cross-functional teams without direct authority and communicate technical conclusions clearly to engineering leaders, program teams, quality stakeholders, and business leaders.
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Strong written documentation skills, including technical reports, qualification summaries, review packages, engineering standards, and executive-ready technical recommendations.
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Ph.D. or advanced degree focused on SiC power devices, wide-bandgap semiconductor reliability, power electronics, device modeling, or semiconductor process/device integration.
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Direct experience with SiC MOSFET, Schottky diode, PiN diode, JBS/MPS diode, power module, or known-good-die development.
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Experience with ultra-high-voltage SiC technologies, including 2300 V, 3300 V, 6500 V, or higher-voltage devices.
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Knowledge of qualification standards and robustness expectations such as AEC-Q101, JEDEC, HTRB, HTGB, H3TRB, THB, TDDB, HTOL, power cycling, temperature cycling, DRB, DGS, avalanche/UIS, and short-circuit testing.
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Experience with TCAD, SPICE, electrothermal modeling, compact modeling, mission-profile analysis, or system-level power conversion behavior.
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Experience working with foundries, OSATs, reliability labs, failure analysis labs, universities, suppliers, customers, or strategic technology partners.
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Track record of patents, publications, conference presentations, internal technology standards, or major technical platform contributions.
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Recognized technical depth in SiC power semiconductor behavior, reliability, characterization, and technology development.
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Systems thinking across device, process, package, test, reliability, and application environments.
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Strong technical judgment and ability to make decisions under incomplete or evolving data conditions.
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Ability to simplify complex technical problems and align global teams around clear next steps.
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High ownership, technical rigor, and accountability for closing critical technology issues.
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Ability to mentor engineers, raise engineering standards, and build scalable capability within the India CoE.
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Comfort operating in a fast-moving, global, innovation-focused power semiconductor environment.
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Successful leadership of high-impact SiC technology investigations, development milestones, and qualification-readiness decisions.
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Clear reduction in technical risk through robust characterization, reliability learning, root-cause analysis, and design/process/package improvement recommendations.
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Improved engineering productivity through reusable methods, automated analysis flows, technical standards, and mentoring.
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Demonstrated contribution to Navitas SiC platform differentiation in performance, reliability, ruggedness, quality, and application readiness.
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Strong collaboration with global stakeholders and visible capability building within the India Center of Excellence.
The Staff Engineer will report into the SiC Technology / Device Engineering leadership organization and will serve as a senior technical interface between the India Center of Excellence and Navitas global engineering, product, reliability, quality, packaging, applications, operations, and business teams.
