Senior Member Technical Staff

Siemens -
Bengaluru, Karnataka

Apply Now

Job details

Permanent | Full-time

Qualifications

Data structures
Master's degree
Verilog
Analysis skills
C++
C
Bachelor's degree
Software development
SystemVerilog
Python

Full job description

Join Our Aprisa Team!

Looking for Siemens EDA ambassadors

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the Increasingly complex world of chip, board, and system design.

We make real what matters.

This is your role.

At Aprisa, we offer complete functionality for top-level hierarchical design and block-level implementation for complex digital IC designs. Our detail-route-centric architecture and hierarchical database enable you to accelerate design closure and achieve optimal quality of results at a driven runtime. We are working on the next generation RTL-to-GDSII solution. You will be working primarily on C++ and should be able to completely own and drive the design and development of various pieces of the RTL synthesis technology, logic optimizations and power synthesis.

This is the Role

Drive and be responsible for the design and development of various pieces of the RTL synthesis technology, logic optimizations, RTL design IP development, and low power synthesis.
Guide and lead others toward successful project completion by innovating and implementing powerful solutions.
Collaborate with a hardworking team of experts.

Must Requirements:

1-5 years of experience in software development
B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college.
Good knowledge of C/C++, algorithm and data structures
Good problem solving and analytical skills
Should be able to guide and lead others, towards project completion.

Good to have experience or understanding in:

RTL synthesis tool development.
System Verilog, VHDL, UPF, DFT, formal verification, Dynamic Power.
RTL & gate level logic optimizations
Parallel algorithms & jobs distribution
Scripting languages (Python, Tcl)

We are Siemens

We are an equal opportunity employer and value diversity at our company. We do not discriminate based on any race, religion, colour, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

Join our Talent Community today and let's stay connected in areas that interest you.

Transform the everyday

Accelerate Transformation

#LI-EDA

#LI-Hybrid

Apply Now

Looking for Siemens EDA ambassadors

This is the Role

We are Siemens

Jobseeker tools

Employer Tools

Browse

Stay Connected