Ventana is building the highest-performance RISC-V CPUs on the planet—designed for data center, AI, and edge workloads, with real silicon, not slideware.
Our second-generation Veyron core (V2) is on track to ship early next year, featuring an aggressive wide-issue pipeline and built in 4nm. Development on Veyron V3 is ramping now, with even greater performance and deep AI platform integration. This is your opportunity to work alongside engineers who built iconic processors like the AMD K6 and the first 64-bit ARM server processor (X-Gene at AppliedMicro)—bringing decades of CPU innovation to a clean-slate, open-standards future. You can check us out here:
Ventana Micro - YouTube
We are looking to fill multiple FPGA backend roles to support the development of our innovative RISC-V processors and subsystems. We have offices in Pune and Bangalore, India and in the United States in California and Texas.
Roles: Staff/Senior Staff/Principal FPGA Engineer, Multiple Openings
Locations: USA (Cupertino, California), India (Pune/Bangalore)
Position: Full time with immediate start
Job Description
FPGA prototyping with Ventana RISC-V CPU, Xilinx and the third party SoC components – integration, simulation, and implementation in multiple-FPGA platform. Collaborate with RTL/DV teams for full chip integration and simulation. Drive multiple-FPGA implementation of the full chip, timing and performance optimization. Collaborate with SW/Validation teams to bring-up the full chip from boot FW to system OS.
Skills and Qualifications Required
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Expertise in FPGA prototyping methodologies, HW debug, and optimization
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Expertise in mapping and partitioning complex designs in multiple FPGA platforms.
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Proficiency in Verilog and SytemVerilog language
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Familiarity with CPU architecture (e.g. ARM, RISC-V)
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Minimum of a bachelor’s degree in electrical engineering, Computer Engineering, or related fields.
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7+ years of relevant industry experience.
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Strong communication skills and ability to work in a fast-paced environment.
Skills and Qualifications Desirable
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Experience in DV simulation.
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Experience with DPI (Direct Programming Interface) and transactors.
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Proficiency in programming and scripting languages such as C, C++, and Python
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Experience with debugging tools like openocd or gdb for firmware debugging on FPGAs.
EEOE
Ventana is an Equal Employment Opportunity Employer. We value diversity and uphold an inclusive environment where all people feel that they are equally respected and valued. Qualified applicants will receive consideration without regard to race, color, creed, religion, sex, sexual orientation, national origin or nationality, ancestry, age, disability, gender identity or expression, marital status, veteran status, or any other category protected by law.
COVID-19
Ventana encourages all employees to be fully vaccinated (and boosted, if eligible) against COVID-19. We do require Proof of vaccination (or proof of a negative PCR test) to work in the office or meet with customers/ business partners.
NOTICE: External Recruiters/ Staffing Agencies:
Ventana Micro instructs agencies not to engage with its employees to present candidates. Employees are not authorized to enter into any agreement regarding the placement of candidates. All unsolicited resumes received as gratuitous submissions. We reserve the right to directly contact any candidate speculatively submitted by a third party. Such contact will not constitute acceptance of any contractual arrangement between Ventana and the agency, and Ventana will not be liable for any fees should it choose to engage the candidate’s services. All external recruiters and staffing agencies are required to have a valid contract executed by Ventana’s CFO.
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