Miyapur Hyderabad Telangana Rtl design engineer Jobs – 96 Open Jobs Today

Lead Engineer - Synthesis
Quest Global —Hyderabad, Telangana
- Full-time
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Senior Verification Engineer
AST SpaceMobile —Hyderabad, Telangana
- Master's degree
- Analysis skills
- Electrical experience
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Coherency Verification Engineer
TechBiz Global GmbH —Hyderabad, Telangana
- Full-time
- Remote
- Doctoral degree
- English
- Master's degree
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Senior ASIC Verification Engineer
Axiado —Hyderabad, Telangana
- Full-time
- Master's degree
- Bachelor's degree
- Python
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Sr. Engineer Bangalore / Hyderabad
Ambit Semiconductors —Hyderabad, Telangana
- Master's degree
- Bachelor's degree
- Scripting
[India] Senior UCIe Verification Engineer
EdgeCortix —Hyderabad, Telangana
- Full-time
- Research
- Scripting
- Python
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Senior Engineer - STA
Quest Global —Hyderabad, Telangana
- Full-time
- Master's degree
- Bachelor's degree
- Scripting
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Silicon Validation Director/Manager
Kandou AI —Hyderabad, Telangana
- Full-time
- Hybrid work
- Master's degree
- Electrical experience
- Bachelor's degree
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13d
Principal Engineer, STA & Synthesis
Renesas Electronics —Hyderabad, Telangana
- Full-time
- Remote
- Computer science
- Master's degree
- Scripting
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IP/Subsystem Verification Lead
Advanced Micro Devices, Inc —Hyderabad, Telangana
- Master's degree
- C++
- Bachelor's degree

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Lead Engineer - Synthesis

Quest Global -
Hyderabad, Telangana

Quick apply

Job details

Full-time

Full job description

Job Requirements

At Quest Global, it’s not just what we do but how and why we do it that makes us different. With over 25 years as an engineering services provider, we believe in the power of doing things differently to make the impossible possible. Our people are driven by the desire to make the world a better place—to make a positive difference that contributes to a brighter future. We bring together technologies and industries, alongside the contributions of diverse individuals who are empowered by an intentional workplace culture, to solve problems better and faster.

We are seeking an experienced Lead Engineer - Synthesis to drive RTL-to-Gate synthesis activities for complex SoC/IP designs. The candidate will be responsible for achieving timing, area, power, and quality targets while collaborating closely with Design, DFT, Physical Design, and STA teams. The role requires strong technical expertise in synthesis methodologies, low-power design techniques, and EDA tools.

Key Responsibilities

Lead RTL synthesis activities for complex SoC and IP blocks.
Develop and maintain synthesis flow, scripts, constraints, and methodologies.
Perform RTL quality checks and ensure synthesizability of designs.
Analyze and optimize timing, area, power, and congestion metrics.
Work closely with RTL, STA, Physical Design, and DFT teams to resolve design issues.
Create and validate SDC constraints for synthesis and timing closure.
Perform design reviews and provide technical guidance to junior engineers.
Drive QoR improvements through design and flow optimizations.
Support low-power implementations including UPF/CPF methodologies.
Debug synthesis, LEC, and timing issues across multiple design stages.
Contribute to methodology enhancements and automation initiatives.

We are known for our extraordinary people who make the impossible possible every day. Questians are driven by hunger, humility, and aspiration. We believe that our company culture is the key to our ability to make a true difference in every industry we reach. Our teams regularly invest time and dedicated effort into internal culture work, ensuring that all voices are heard.

We wholeheartedly believe in the diversity of thought that comes with fostering a culture rooted in respect, where everyone belongs, is valued, and feels inspired to share their ideas. We know embracing our unique differences makes us better, and that solving the worlds hardest engineering problems requires diverse ideas, perspectives, and backgrounds. We shine the brightest when we tap into the many dimensions that thrive across over 21,000 difference-makers in our workplace.

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rtl design engineer jobs in miyapur hyderabad telangana

Lead Engineer - Synthesis

Senior Verification Engineer

Coherency Verification Engineer

Senior ASIC Verification Engineer

Sr. Engineer Bangalore / Hyderabad

[India] Senior UCIe Verification Engineer

Senior Engineer - STA

Silicon Validation Director/Manager

Principal Engineer, STA & Synthesis

IP/Subsystem Verification Lead

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