New Delhi South Ext Ii Delhi Delhi Asic digital design, principal engineer Jobs – 297 Open Jobs Today

Sr. Principal Design Engineer
Cadence Design Systems —Noida, Uttar Pradesh
- Full-time
- Data analysis skills
- Master's degree
- Analysis skills
Principal Software Engineer
Cadence Design Systems —Noida, Uttar Pradesh
- Full-time
- Java
- Master's degree
- C++
Sr Principal Application Engineer
Cadence Design Systems —Noida, Uttar Pradesh
- Full-time
- C++
- Communication skills
ASIC/FPGA Design Engineer
Ciena —Gurugram, Haryana
- Full-time
- System design
- Master's degree
- Electrical experience
ASIC Digital Design, Principal Engineer
Synopsys —Noida, Uttar Pradesh
- Electrical experience
- Mentoring
- In-person
Lead Engineer (IP Design & Microarchitecture)
Siemens —Noida, Uttar Pradesh
- Full-time
- Doctoral degree
- Master's degree
- C++
ASIC Digital Design, Staff Engineer
Synopsys —Noida, Uttar Pradesh
- In-person
3d
Principal Engineer - Fire
WSP —Noida, Uttar Pradesh
- Hybrid work
- Microsoft Word
- AutoCAD
- Microsoft Excel
Principal Engineer, RTL Design
Renesas Electronics —Noida, Uttar Pradesh
- Full-time
- Computer Science
- Master's degree
- Project management
Quick apply
Staff ASIC RTL Design (Turing) - Engineer
Qualcomm —Noida, Uttar Pradesh
- Doctoral degree
- Computer Science
- Master's degree
CPU Design - Associate Engineer
Qualcomm —Noida, Uttar Pradesh
- Doctoral degree
- Computer Science
- Master's degree
8h
ASIC Digital Design, Manager
Synopsys —Noida, Uttar Pradesh
- Management
- B.Sc
- Electrical experience
Principal Engineer (Frontend) - I
Deutsche Telekom Digital Labs —Gurugram, Haryana
- JavaScript
- APIs
- AI
1d
Principal Engineer - Audio Visual Systems
WSP —Noida, Uttar Pradesh
- Hybrid work
- Agile
- Communication skills
Principal Engineer - Digital Workplace
Insight Enterprises —Gurugram, Haryana
- Azure
- Microsoft Office
- Bachelor's degree
- Health insurance
12h
Principal Engineer- ASIC Digital Design (Die to Die Communication protocol)
Synopsys —Noida, Uttar Pradesh
- Electrical experience
- Continuous improvement
- In-person
- Health insurance
ASIC Digital Design, Sr Manager
Synopsys —Noida, Uttar Pradesh
- English
- Scripting
- In-person
Principal Engineer - Hydrology
WSP —Noida, Uttar Pradesh
- Hybrid work
- Civil engineering
- Computer literacy
- English
3d
Software Engineer Associate
Siemens —Noida, Uttar Pradesh
- Full-time
- Master's degree
- Electrical experience
- Bachelor's degree
1d
Principal Engineer - Water
WSP —Noida, Uttar Pradesh
- Hybrid work
- Civil engineering
- Microsoft Excel
- Computer literacy
3d

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Sr. Principal Design Engineer

Cadence Design Systems -
Noida, Uttar Pradesh

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Job details

Full-time

Qualifications

Data analysis skills
Master's degree
Analysis skills
Bachelor's degree
Perl
Macros
Electrical Engineering
Python

Full job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

1. Role Overview & Objective

We are looking for a motivated SRAM Circuit Design Engineer to join our semiconductor engineering team developing circuits and SRAM/Register File for low power, low voltage and high performance.
This role is ideal for candidates who are passionate about memory design, characterization methodologies, and physical verification, and who are eager to build a strong foundation in VLSI memory development.

2. Key Responsibilities

Circuit Design & Optimization: Build full-custom or compiler-based SRAM macros, sense amplifiers, and self-timed circuits.
Simulation & Characterization: Run SPICE simulations to analyze timing, power, and Static Noise Margin (SNM) across process corners.
Layout Supervision: Direct physical design and layout teams to handle process variability and FinFET manufacturing rules.
Silicon Validation & Debug: Support post-silicon testing and troubleshooting hardware failures

3. Required Qualifications & Experience

Education: B.Tech/M.Tech in Electrical Engineering, VLSI, or Microelectronics.
Experience: Typically ranges from 6 to 18 years depending on whether the role is entry/mid-level or a senior lead/architect position.

Core Knowledge: Deep understanding of CMOS device physics, transistor sizing, and memory cell stability.
Tools: Proficiency in EDA software like Cadence Virtuoso or SPICE simulators.
Scripting: Ability to use Python or Perl for workflow automation and data analysis

4. Behavioral & Soft Skills

Strong analytical and problem-solving skills.
High attention to detail.
Ability to collaborate cross-functionally with circuit designers, architecture teams, and CAD engineers.

We’re doing work that matters. Help us solve what others can’t.

Apply Now

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asic digital design, principal engineer jobs in new delhi south ext ii delhi delhi

Sr. Principal Design Engineer

Principal Software Engineer

Sr Principal Application Engineer

ASIC/FPGA Design Engineer

ASIC Digital Design, Principal Engineer

Lead Engineer (IP Design & Microarchitecture)

ASIC Digital Design, Staff Engineer

Principal Engineer - Fire

Principal Engineer, RTL Design

Staff ASIC RTL Design (Turing) - Engineer

CPU Design - Associate Engineer

ASIC Digital Design, Manager

Principal Engineer (Frontend) - I

Principal Engineer - Audio Visual Systems

Principal Engineer - Digital Workplace

Principal Engineer- ASIC Digital Design (Die to Die Communication protocol)

ASIC Digital Design, Sr Manager

Principal Engineer - Hydrology

Software Engineer Associate

Principal Engineer - Water

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