Maharashtra Hardware engineers Jobs – 93 Open Jobs Today

Senior Staff Manager
Marvell —Pune, Maharashtra
- Full-time
- Master's degree
- Electrical experience
- Bachelor's degree
IP Verification Engineer
TechBiz Global GmbH —Mumbai, Maharashtra
- Full-time
- Remote
- Bachelor's degree
- Electrical Engineering
Quick apply
10d
VLSI ENGINEER L3
Wipro Limited —Pune, Maharashtra
- SharePoint
UVM Verification specialist for ASIC and/or FPGA development
AFRY —Pune, Maharashtra
- Python
RTL Design Lead
LinkedLoops —Pune, Maharashtra
- Bachelor's degree
Sr Principal Design Engineer
Cadence Design Systems —Pune, Maharashtra
- Full-time
- Sales
Hardware Engineer
GM Manufacturing Services Pvt Ltd —Parvati, Pune, Maharashtra
- ₹18,000 - ₹50,000 a month
- Full-time
- Master's degree
- Analysis skills
- Electrical experience
Quick apply
1d
Hardware Engineer
Kohler India Corporation —Pune, Maharashtra
- Presentation skills
- Bachelor's degree
- Electrical Engineering
3h
Hardware Design Engineer
Aeron Systems —Pune, Maharashtra
- Full-time
- Master's degree
- Bachelor's degree
6d
Embedded Engineer Hardware
Autosys Industrial Solutions Pvt Ltd —Ghatkopar, Mumbai, Maharashtra
- ₹25,000 - ₹35,000 a month
- Full-time
- Bachelor's degree
- Software development
- In-person
- Paid sick time
Quick apply
3d
Electronics & Hardware Design Engineer
Cradlewise —Pune, Maharashtra
- Full-time
- Master's degree
- Electrical experience
- Bachelor's degree
23h
Senior Device Engineer
NAVITAS SEMICONDUCTOR USA, INC. —Pune, Maharashtra
- Doctoral degree
- Research
- Master's degree
Quick apply
2d

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Cloud Engineer Intern L1
Comprinno Technologies Pvt. Ltd. —Baner, Pune, Maharashtra
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IP Verification Engineer
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Senior Staff Manager

Marvell -
Pune, Maharashtra

Apply Now

Job details

Full-time

Qualifications

Master's degree
Verilog
SoC
Electrical experience
Bachelor's degree
Computer Engineering
SystemVerilog
AI
Leadership
Communication skills

Full job description

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

CCS BU focusing on Octeon/Fusion/CXL/Storage product lines. CCS-IN is actively contributing to all products. As a Digital IC Design Senior Staff Manager within CCS-IN in Marvell, you’ll be part of a digital team of about twenty people making a big impact on this organization.

This team hires some of the biggest problem solvers in Silicon and has a huge impact on the work done at Marvell. The customers served by this team are often other chip companies and big tech companies, familiar names to all candidates.

What You Can Expect

Technical Strategy & Architecture: Define micro-architecture for complex blocks and subsystems, ensuring they meet rigorous performance, power, and area (PPA) targets.
Team Leadership & Mentorship: Manage a team of 10–12 engineers, fostering a culture of innovation while providing hands-on technical guidance to both junior and senior staff.Manage, mentor, and coach engineers, including hiring and performance management.
Project Execution: Oversee the entire silicon lifecycle, including RTL design, synthesis, timing closure, and physical design coordination to meet aggressive tape-out schedules.
Cross-Functional Collaboration: Partner with Verification, Physical Design (PD), and DFT (Design for Test) teams to ensure robust, timing-closed, and high-yield silicon.
Stakeholder Management: Align engineering roadmaps with business objectives, manage project budgets, and provide regular status updates to executive leadership.
Process Improvement: Establish and enforce RTL quality standards, best practices, and advanced verification methodologies

What We're Looking For

Key Requirements

Experience:

Typically 12–18+ years of hands-on experience in VLSI design, with at least 3–5 years in a formal management or technical lead capacity.

Technical Mastery:

Expertise in Verilog/SystemVerilog and SoC interconnect protocols like NoC, AXI, and AHB.

Deep understanding of clocking, reset architectures, and CDC/RDC analysis.

Proficiency with EDA tools from vendors like Synopsys or Cadence for synthesis, linting, and static timing analysis.

Education:

Bachelor’s or Master’s degree in Electrical or Computer Engineering (specialisation in VLSI preferred).

Soft Skills:

Strong communication, problem-solving, and "brokering" skills to achieve consensus among diverse stakeholders.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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hardware engineers jobs in maharashtra

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VLSI ENGINEER L3

UVM Verification specialist for ASIC and/or FPGA development

RTL Design Lead

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