New Delhi South Ext Ii Delhi Delhi Asic digital design, principal engineer Jobs – 304 Open Jobs Today

ASIC/FPGA Design Engineer
Ciena —Gurugram, Haryana
- Full-time
- System design
- Master's degree
- Electrical experience
ASIC Digital Design, Principal Engineer
Synopsys —Noida, Uttar Pradesh
- Electrical experience
- Mentoring
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Siemens —Noida, Uttar Pradesh
- Full-time
- Doctoral degree
- Master's degree
- C++
ASIC Digital Design, Staff Engineer
Synopsys —Noida, Uttar Pradesh
- In-person
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Principal Engineer - Fire
WSP —Noida, Uttar Pradesh
- Hybrid work
- Microsoft Word
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Principal Engineer, RTL Design
Renesas Electronics —Noida, Uttar Pradesh
- Full-time
- Computer Science
- Master's degree
- Project management
Quick apply
Staff ASIC RTL Design (Turing) - Engineer
Qualcomm —Noida, Uttar Pradesh
- Doctoral degree
- Computer Science
- Master's degree
CPU Design - Associate Engineer
Qualcomm —Noida, Uttar Pradesh
- Doctoral degree
- Computer Science
- Master's degree
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ASIC Digital Design, Manager
Synopsys —Noida, Uttar Pradesh
- Management
- B.Sc
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Principal Engineer (Frontend) - I
Deutsche Telekom Digital Labs —Gurugram, Haryana
- JavaScript
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Principal Engineer - Audio Visual Systems
WSP —Noida, Uttar Pradesh
- Hybrid work
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Principal Engineer - Digital Workplace
Insight Enterprises —Gurugram, Haryana
- Azure
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Principal Engineer- ASIC Digital Design (Die to Die Communication protocol)
Synopsys —Noida, Uttar Pradesh
- Electrical experience
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ASIC Digital Design, Sr Manager
Synopsys —Noida, Uttar Pradesh
- English
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Principal Engineer - Hydrology
WSP —Noida, Uttar Pradesh
- Hybrid work
- Civil engineering
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Software Engineer Associate
Siemens —Noida, Uttar Pradesh
- Full-time
- Master's degree
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Principal Engineer - Water
WSP —Noida, Uttar Pradesh
- Hybrid work
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Associate Principal Engineer
BOLD LLC —Noida, Uttar Pradesh
- Databases
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Mott MacDonald —Noida, Uttar Pradesh
- Full-time
- AutoCAD
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Principal Consultant - Design Management
WSP —Noida, Uttar Pradesh
- Hybrid work
- AutoCAD
- Civil engineering
- Master's degree

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ASIC/FPGA Design Engineer

Ciena -
Gurugram, Haryana

Apply Now

Job details

Full-time

Qualifications

BSEE
FPGA
System design
Master's degree
Verilog
Electrical experience
Bachelor's degree
Product development
Embedded software
Ethernet
Perl
Computer Engineering
Scripting
SystemVerilog
Electrical Engineering
Communication skills
Python
Digital design

Full job description

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact.

Ciena India Private Limited seeks an ASIC/FPGA Design Engineer to contribute to the design, verification, and implementation of networking hardware. The role supports FPGA designs across data path and control functions and contributes throughout the product development lifecycle. Success in this position helps deliver reliable, high-performance networking solutions.

How you will make an impact:

Design, develop, and verify digital logic for ASICs and FPGAs using Verilog and SystemVerilog.
Contribute to VLSI design activities from specification through synthesis, place and route, and timing closure.
Perform logic simulation and analyze results to validate functional correctness and performance.
Collaborate on hardware-software integration to enable system operation.
Execute design bring-up, debugging, and validation activities in the lab.
Investigate customer issues and deliver resolutions.
Mentor new graduates and junior team members.

The must haves:

Education: Master’s degree in Electrical Engineering OR Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
Experience: 10+ years of progressive engineering experience, ideally within a product development company.
Application of ASIC and FPGA design methodologies.
Utilization of Verilog and SystemVerilog for digital design and verification.
Experience with IP integration and hardware-software integration.
Knowledge of transport system design and protocols including Ethernet and OTN, and interface protocols such as PCIe, SPI, I2C, and MDIO.
Application of back-end constraints and entry into vendor design flows.
Utilization of design tools such as Vivado and Quartus.
Problem-solving, analytical, and independent thinking applied to design challenges.
Communication and collaboration skills used in cross-functional environments.

Nice to haves:

Scripting knowledge using Tcl, Python, or Perl.

#LI-MP2

At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.

Ciena is an Equal Opportunity Employer, including disability and protected veteran status.

If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

Apply Now

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How you will make an impact:

Design, develop, and verify digital logic for ASICs and FPGAs using Verilog and SystemVerilog.

Contribute to VLSI design activities from specification through synthesis, place and route, and timing closure.

Perform logic simulation and analyze results to validate functional correctness and performance.

Collaborate on hardware-software integration to enable system operation.

Execute design bring-up, debugging, and validation activities in the lab.

Investigate customer issues and deliver resolutions.

Mentor new graduates and junior team members.

The must haves:

Education: Master’s degree in Electrical Engineering OR Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.

Experience: 10+ years of progressive engineering experience, ideally within a product development company.

Application of ASIC and FPGA design methodologies.

Utilization of Verilog and SystemVerilog for digital design and verification.

Experience with IP integration and hardware-software integration.

Knowledge of transport system design and protocols including Ethernet and OTN, and interface protocols such as PCIe, SPI, I2C, and MDIO.

Application of back-end constraints and entry into vendor design flows.

Utilization of design tools such as Vivado and Quartus.

Problem-solving, analytical, and independent thinking applied to design challenges.

Communication and collaboration skills used in cross-functional environments.

Nice to haves:

Scripting knowledge using Tcl, Python, or Perl.