/ fw validation lead Jobs

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Director, Design Verification

Marvell -
Hyderabad, Telangana

Apply Now

Job details

Full-time

Qualifications

Computer science
B.Sc
SoC
Bachelor's degree
Ethernet
Computer Engineering
Computer networking
Electrical Engineering
AI
Communication skills

Full job description

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell's Photonic Fabric™ team is building next-generation optical interconnect technology for the era of accelerated computing. As AI workloads scale, the bottleneck has shifted from compute to interconnect bandwidth, memory bandwidth, and memory capacity. Our Photonic Fabric delivers a tenfold improvement in performance and energy efficiency—deployed as optical interface chiplets, optical interposers, and Optical Multi-chip Interconnect Bridges (OMIB) that integrate seamlessly into customers' AI accelerators and GPUs.

This is a founding role. You will build and lead a new verification and emulation team in India from the ground up, working closely with our established teams in the US. We're looking for someone who combines deep technical credibility with the energy and leadership to attract top engineers and create a team culture where talented people thrive. If you've been waiting for the chance to shape a team, define its culture, and tackle problems at the frontier of optical interconnect—this is it.

What You Can Expect

Build, lead, and grow a verification and emulation engineering team in India, owning hiring, mentoring, and retention from day one

Collaborate with US-based architecture, design, and verification leads to develop verification strategies for complex SoCs, chiplets, and multi-generation product roadmaps

Own the verification of complex systems end-to-end—from verification planning through coverage closure and tapeout

Drive the technical direction of the team: developing innovative verification strategies, maintaining high-quality code standards, and pushing the state of the art in methodology and automation

Develop and maintain long-term verification plans spanning multiple product generations

Own schedules, define progress metrics, and provide clear visibility into execution status across sites

Provide hands-on technical mentorship, actively identifying improvements in methodologies, techniques, and infrastructure

Partner with software and emulation teams to enable HW-SW co-development and accelerate silicon validation

What You Can Expect

Lead DV, emulation and post silicon validation execution with zero defect mindset.
Define DV, emulation and post silicon validation scope.
Define execution timelines working closely with stakeholders.
Set goals, monitor, and take steps to keep the execution on track.
Define DV methodology and verification strategies.
Drive definition and implementation of DV TB architectures.
Collaborate with Architecture, Design, DFT, PD, FW and system teams for successful product execution.
Lead tool evaluation and selection.
Drive continuous productivity improvements through incremental and forklift changes.
Monitoring industry DV trends and adapting to key trends.
Hire, build and retain high performance engineering team.
Address continuous training and development needs of the team.

What We're Looking For

BS degree or higher in Electrical Engineering, Computer Engineering, or Computer Science with 15+ years of relevant industry experience in semiconductor verification or emulation

10+ years of experience managing Design Verification, Emulation, or related engineering teams

Demonstrated ability to recruit, mentor, and retain strong verification and emulation engineers—people want to come work with you

Capable of leading technical direction while staying hands-on: developing verification strategies, reviewing code, and making architectural decisions

Strong experience with cross-site team coordination and collaboration

Excellent communication skills with the ability to operate effectively across time zones and organizational boundaries

Preferred:

Experience with full-chip verification, development, and emulation of complex designs targeting data center, server, or enterprise networking applications

Expert-level experience developing verification infrastructure for IP, subsystem, chiplet, and SoC-level environments

Experience with one or more high-speed I/O technologies: DDR, PCIe, CXL, or Ethernet

Knowledge of industry-standard SoC components: bus fabrics, I/O devices, and processor subsystems

Knowledge of HW-SW co-development workflows and silicon validation cycles

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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